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<H1>BSR -- Bit Scan Reverse</H1>

<PRE>
Opcode    Instruction          Clocks    Description

0F  BD    BSR r16,r/m16        10+3n     Bit scan reverse on r/m word
0F  BD    BSR r32,r/m32        10+3n     Bit scan reverse on r/m dword
</PRE>

<H2>Operation</H2>

<PRE>
IF r/m = 0
THEN
   ZF := 1;
   register := UNDEFINED;
ELSE
   temp := OperandSize - 1;
   ZF := 0;
   WHILE BIT[r/m, temp] = 0
   DO
      temp := temp - 1;
      register := temp;
   OD;
FI;
</PRE>

<H2>Description</H2>

BSR scans the bits in the second word or doubleword operand from the most
significant bit to the least significant bit. The ZF flag is cleared if the
bits are all 0; otherwise, ZF is set and the destination register is loaded
with the bit index of the first set bit found when scanning in the reverse
direction.

<H2>Flags Affected</H2>

ZF as described above

<H2>Protected Mode Exceptions</H2>

#GP(0) if the result is in a nonwritable segment; #GP(0) for an illegal
memory operand effective address in the CS, DS, ES, FS, or GS segments;
#SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page
fault

<H2>Real Address Mode Exceptions</H2>

Interrupt 13 if any part of the operand would lie outside of the effective
address space from 0 to 0FFFFH

<H2>Virtual 8086 Mode Exceptions</H2>

Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault


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<P>
<B>up:</B> <A HREF="c17.htm">
Chapter 17 -- 80386 Instruction Set</A><BR>
<B>prev:</B><A HREF="BSF.htm"> BSF Bit Scan Forward</A><BR>
<B>next:</B><A HREF="BT.htm"> BT Bit Test</A> 
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